TurboBist-Memory
Embedded Memory Testing

Waveform Analysis & Source Code Debug Simulation Functional Verification Test Vector Conversion Fault Simulation ATPG

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Highlights
Best-in-Class Technology
Efficient Bist Structures
Supports All Embedded Memories
#1 in Price/Performance!

High Performance Embedded Memory Testing
TurboBIST-Memory™ family of products from SynTest Technologies, Inc., includes tools for adding highly efficient BIST structures to all types of embedded memories including SRAMs, ROMs, SDRAMs and CAMs. These tools, part of SynTest's complete suite of testability analysis, scan synthesis, ATPG and fault simulation solutions, automatically synthesize the BIST logic surrounding the memory blocks and generate the test patterns needed to provide very high fault coverage testing of complete complex system-on-chip ICs. A single IEEE 1149.1 compliant TAP controller on the chip can be used to control multiple "BISTed" embedded memory cells of all types, as well as for controlling scan and boundary scan functions,thus keeping silicon overhead to the absolute minimum.

SDRAM and CAM BIST are currently available as services from SynTest's Applications Engineering group. SRAM and ROM BIST can be implemented either by using SynTest's service group or by acquiring licenses for the tools for inhouse use. Programmable SRAM BIST is also available as a service.

Benefits:
Automatically generates classical or user configurable test pattern test

Includes March C-, Moving Inversion March, March C++ and Checkerboard

Allows simultaneos, multiple BIST memory test via a shared controller
Supports embedded SRAMs, ROMs, SDRAMs and CAMs

Outputs logic Verilog/VHDL synthesizable RTL code

Outputs logic synthesis scripts
Generates Verilog/VHDL test bench code automatically to reduce test design time
Other Information

Platforms:
Sun Solaris
HP-UX
Linux

More Information:
TurboBist-Memory Datasheet (PDF)

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